Calibration method for slice level of zero cross signal and method of producing track-crossing signal

ABSTRACT

A calibration method for a slice level of zero cross signal and a method of producing zero cross signal are disclosed. In this invention, the positive cycle and the negative cycle of the zero cross signal are sampled to obtain an error value related to the slice level due to asymmetry of the zero cross signal. By this invention, the asymmetry between the positive cycle and the negative cycle of the zero cross signal can be adjusted.

FIELD OF THE INVENTION

The present invention relates to a calibration method for a slice levelof zero cross signal and a method of producing track-crossing signal.More particularly, the invention relates a calibration method for slicelevel of radio frequency zero cross (RFZC) signal and a method ofadjusting the slice level of the RFZC signal by sampling half cycle ofRFZC signal.

BACKGROUND OF THE INVENTION

Due to the advancement of science and continuous development ofmultimedia, CD-ROM drive has become very popular. The main advantage ofCD is high capacity to save data so the speed and the stabilization ofCD-ROM drive are very important. When a CD-ROM drive reads data, thereis a need for track seeking and track locking. Therefore, theperformance of track seeking and track locking will affect the speed andstabilization of CD-ROM drive. In track seeking and locking, radiofrequency ripple (RFRP) signal and RFZC signal are very important.

Referring to FIG. 1, that shows a circuit diagram of generating radiofrequency zero cross signal. As shown in FIG. 1, an intermediate signalis created by the RFRP through an analog to digital converter. Theintermediate signal is calculated through a low pass filter simulated bya digital signal processor (DSP) 20. Then the output of the DSP 20 istransformed through the digital to analog converter DAC 30 to obtain ananalog signal. The analog signal is defined as a slice level (V_SL) ofthe RFRP, and then the RFZC signal is generated from the V_SL signal andthe RFRP signal through a comparative amplifier.

Reference is made to FIG. 2, which shows a timing diagram of slice levelof radio frequency zero cross signal. In track locking, V_SL is createdby passing RFRP signal through a low pass filter. However, a digitalsignal processor may simulate the function of the low pass filter. Whenthe CD-ROM drive begins, a stable V_SL will be generated after asettling time caused by the low pass filter. The settling time is aboutforty-six milliseconds.

Reference is made to FIG. 3, which shows a conventional circuit ofgenerating the RFZC signal. As shown in FIG. 3, the comparativeamplifier consists of a first resistor 110, a second resistor 112, athird resistor 114, a fourth resistor 116, a fifth resistor 118, acapacitor 120 and an amplifier 122. A terminal of the first resistor 110is coupled with RFRP signal and another terminal of the first resistor110 is coupled with a terminal of the second resistor 112. Anotherterminal of the second resistor 112 is coupled with the positive inputof the amplifier 122. The positive input point of the amplifier 122 isfurther coupled with one terminal of the third resistor 114. Anotherterminal of the third resistor 114 is coupled with the output of theamplifier 122. A terminal of the forth resistor 116 is coupled with theoutput of the amplifier 122. Another terminal of the forth resistor 116is coupled with a power supply (5 volts). One terminal of the fifthresistor 118 is coupled with V_SL and another terminal of the fifthresistor 118 is coupled with the negative input of the amplifier 122which is coupled with one terminal of the capacitor 120. Anotherterminal of the capacitor 120 is grounded.

The RFZC signal is generated based on the RFRP signal and V_SL throughthe comparative amplifier. The main function of the comparativeamplifier is to compare the RFRP signal with V_SL for generating theRFZC signal. When V_SL is not correct, the RFZC signal will be incorrectso that the CD-ROM drive will have some wrong or bad performance.

Reference is made to FIG. 4, which shows a diagram of generating theRFZC signal from the RFRF signal and the V_SL in the prior art. The RFZCsignal will be different according to different V_SL. In fact, in orderto prevent the RFRP signal from noise interference, a region on thetiming diagram is defined around the V_SL. The V_SL is in the middle ofthe region and the region will be changed according to V_SL. In theregion, the peak level is a threshold high voltage (V_H) of Schmitttrigger and the bottom level is the threshold low voltage (V_L) ofSchmitt trigger. As shown in FIG. 4, the RFZG signal will be positivewhen the RFRP signal is higher than the V_H level of the Schmitttrigger. When the RFRP signal is lower than the V_L level of the Schmitttrigger, the RFZC signal will be negative. Therefore, the positive cycleand the negative cycle of the RFZC signal are relative to V_SL. Ingeneral, it is better for the positive cycle and the negative cycle ofRFZC to be symmetric.

How to compensate for the slice level has been disclosed. In that priorart, the disadvantage of the prior method of compensating for the slicelevel does not respond to the change of the track-crossing signaldynamically. Therefore, the bias voltage will need more time to followthe change of the track-crossing signal when the change of thetrack-crossing signal is rather violent.

V_SL is used in the track-locking process of the servo system in theoptical storage drive (for example, CD-ROM drive, CD-R/RW drive, DVD-ROMdrive, DVD player, DVD-R drive, DVD-RW drive, DVD-RAM drive, DVD+RWdrive and the like). In general, the DSP unit simulates the function ofdigital low pass filter to get the V_SL. However, there are twodisadvantage of using low pass filter. The first disadvantage is thatthe settling time is too long and the second disadvantage is that theSchmitt trigger will induce the positive cycle and the negative cycle ofthe RFZC signal to be asymmetrical. The two disadvantages will affectthe performance of the CD-ROM drive and induce the malfunction of CD-ROMdrive. Therefore, an effective method is needed to solve this problem.

SUMMARY OF THE INVENTION

In view of the background of the invention described above, a low passfilter will induce the settling time too long and the positive cycle andthe negative cycle of the radio frequency zero cross signal to beasymmetrical. The present invention focuses on the need above andprovides a calibration method for a slice level of radio frequency zerocross signal to correct the conventional disadvantage.

It is one purpose of this invention to provide a calibration method fora slice level. In the invention, the positive cycle and the negativecycle of the RFZC signal is sampled to calculate the error value ofslice level and the asymmetry between the positive cycle and thenegative cycle of the radio frequency zero cross signal are adjustedaccording to the change of the slice level.

In accordance with the aforementioned purposes of this invention, theinvention provides a calibration method for a slice level. It consistsof the following steps. First, the positive cycle and the negative cycleof the zero cross signal are sampled to calculate the error value fromthe difference between the two cycles. Adding the error value to theslice level will generate a next slice level.

BRIEF DESCRIPTION OF THE DRAWINGS

The foregoing aspects and many of the attendant advantages of thisinvention will become more readily appreciated as the same becomesbetter understood by reference to the following detailed description,when taken in conjunction with the accompanying drawings, wherein:

FIG. 1 is circuit diagram of generating radio frequency zero crosssignal.

FIG. 2 is a timing diagram of slice level of radio frequency zero crosssignal.

FIG. 3 is a conventional circuit of generating the RFZC signal.

FIG. 4 is a diagram of generating the RFZC signal from the RFRP signaland the V_SL in the prior art.

FIG. 5 is a timing diagram of the slice level according to an embodimentof the present invention.

FIG. 6 is a flow chart of the embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

In the embodiment, the RFZC signal is sampled and counted by a highfrequency, for example, about 1.4 MHz. Therefore, the count number in apositive cycle is defined as NOP and the count number in a negativecycle is defined as NON. The definition of NOP and NON are shown in FIG.5.

Referring to FIG. 5, which shows a timing diagram of the slice levelaccording to an embodiment of the present invention. According to thedescription above, the digital signal processor generates a V_SL fromthe RFRP signal and then the RFZC signal is generated by the RFRP signaland the V_SL through the comparative amplifier. Afterward, sampling theRFZC signal and calculation are performed. Then the result ofcalculation is delivered to the digital signal processor. According tothe calculation equation, the error value is calculated by the digitalsignal processor to adjust a next V_SL.

The equations of calculating the RFRP signal and the RFZC signal toadjust the next error value of V_SL are as follows.

1. Referring to FIG. 5, the error value between the current and the nextV_SL is obtained as: $\begin{matrix}{{err} = {\frac{R_{pp}}{2} \times \sin\quad\left( {\omega \times \Delta\quad t} \right)}} & (1)\end{matrix}$

-   -   wherein R_(pp) is the peak-to-bottom value of the RFRP signal. ω        is the angular frequency (ω=2πf) and the Δt is the difference        between the positive cycle and the negative cycle.

2. Because the Δt is so small so the equation (1) can be rewritten to$\begin{matrix}{{err} = {\frac{R_{pp}}{2} \times \omega \times \Delta\quad t}} & (2)\end{matrix}$

3. The frequency can be presented to $\begin{matrix}{f = \frac{sample\_ frequency}{{NOP} + {NON} + 1}} & (3)\end{matrix}$

-   -   wherein the sample_frequency is the sample frequency for the        RFZC signal.

4. Δt is the difference between the positive cycle and the negativecycle so the Δt can be rewritten to $\begin{matrix}{{\Delta\quad t} = \frac{t_{2} - t_{1}}{4}} & (4)\end{matrix}$

-   -   wherein the t₁ is a time interval for the positive cycle and the        t₂ is a time interval for the negative cycle.

Because of$t_{1} = {{\frac{NOP}{sample\_ frequency}\quad{and}\quad t_{2}} = \frac{NON}{sample\_ frequency}}$so the equation (4) can be presented to $\begin{matrix}{{\Delta\quad t} = \frac{{NON} - {NOP}}{4 \times {sample\_ frequency}}} & (5)\end{matrix}$

6. From the equation (2), (3), (5), we can obtain $\begin{matrix}{{err} = {R_{pp} \times \frac{\pi}{4} \times \frac{{NON} - {NOP}}{{NON} + {NOP} + 1}}} & (6)\end{matrix}$

In the equation (6), (NON+NOP+1) is a sampling number from sampling afull cycle of the RFRP signal. In the equation (6), the result err canbe added to the calculation of digital signal processor to generate thenext V_SL. Therefore, according the equation (6), when the NOP equalsthe NON, the err will be zero. In this moment, the next V_SL will not bechanged. That means the positive cycle and the negative cycle of theRFZC are symmetric. When the difference between the positive cycle andthe negative cycle is large, the err becomes large so that the change ofthe V_SL becomes great to catch the change of the positive cycle and thenegative cycle quickly. Otherwise, in order to compensate for the changeof the positive cycle and the negative cycle efficiently, the equation(6) is${err} = {\frac{{NON} - {NOP}}{{NON} + {NOP} - 1} \times \frac{1}{NON}}$${err} = {\frac{{NON} - {NOP}}{{NON} + {NOP} + 1} \times \frac{1}{NOP}}$during the negative cycle and during the positive cycle.

Referring to FIG. 6, which shows a flow chart of the embodiment of thepresent invention. The steps are described as follows. First, in thestep 150, it is judged whether it is settled. If not, then the flowreturns to the main program in the step 166. If the settling time isachieved, the level of the RFZC signal will be judged whether it ischanged in the step 154. If not, then the flow returns to the mainprogram. If the level of the RFZC signal is changed, the sampling of theprevious half cycle is finished and the level is judged whether thelevel is changed from positive to negative or from negative to positivein the step 158. Afterward the error value is calculated by differentequations. If the level is changed from negative to positive, the NON isupdated and${err} = {\frac{{NON} - {NOP}}{{NON} + {NOP} - 1} \times \frac{1}{NON}}$is used to calculate the error value in the step 160. On the other hand,the NOP is updated, and the equation${err} = {\frac{{NON} - {NOP}}{{NON} + {NOP} + 1} \times \frac{1}{NOP}}$is used to calculate the error value in the step 162.

Finally, the error value from the calculation is added to the currentslice level to become a next slice level in the step 164 and the flowgoes to the main program in the step 166.

The advantage of this invention is that this invention provides acalibration method for the slice level of radio frequency zero crosssignal. In this invention, the positive cycle and the negative cycle ofthe zero cross signal are sampled to calculate an error value. Moreover,adjusting the asymmetry between the positive cycle and the negativecycle of the zero cross signal is performed according to the change ofthe slice level.

As is understood by a person skilled in the art, the foregoing preferredembodiments of the present invention are illustrated of the presentinvention rather than limiting of the present invention. It is intendedto cover various modifications and similar arrangements included withinthe spirit and scope of the appended claims, the scope of which shouldbe accorded the broadest interpretation so as to encompass all suchmodifications and similar structure.

1. A calibration method for a slice level of a signal in an opticalstorage device, comprising: providing a current slice level of thesignal; comparing the current slice level with the signal to obtain azero cross signal of the signal; sampling the zero cross signal of thesignal to obtain an error value; and generating a next slice level basedon the current slice level and the error value.
 2. The method of claim1, wherein the sampling step comprises sampling a first half cycle and asecond half cycle of the zero cross signal to obtain a first samplingnumber and a second sampling number.
 3. The method of claim 2, whereinthe step of obtaining the error value comprises obtaining the errorvalue based on the first sampling number and the second sampling number.4. The method of claim 2, further comprising: updating the secondsampling number when the zero cross signal is positive; and obtainingthe error value based on the first sampling number and the updatedsecond sampling number.
 5. The method of claim 2, further comprising:updating the first sampling number when the zero cross signal isnegative; and obtaining the error value based on the updated firstsampling number and the second sampling number.
 6. A method forproducing a zero cross signal of a signal in an optical storage drive,comprising: providing a current slice level of the signal; comparing thecurrent slice level with the signal to obtain a current zero crosssignal of the signal; sampling the current zero cross signal of thesignal to obtain an error value; obtaining a next slice level based onthe current slice level and the error value; and comparing the nextslice level with the signal to obtain a next zero cross signal of thesignal.
 7. The method of claim 6, wherein the sampling step comprises:sampling a first half cycle and a second half cycle of the zero crosssignal to obtain a first sampling number and a second sampling number.8. The method of claim 7, wherein the step of obtaining the error valuecomprises obtaining the error value based on the first sampling numberand the second sampling number.
 9. The method of claim 7, furthercomprising: updating the second sampling number when the zero crosssignal is positive; and obtaining the error value based on the firstsampling number and the updated second sampling number.
 10. The methodof claim 7, further comprising: updating the first sampling number whenthe zero cross signal is negative; and obtaining the error value basedon the updated first sampling number and the second sampling number. 11.A calibration method for a slice level of a signal in an optical storagedrive, comprising: sampling a zero cross signal of the signal to obtainan error value, wherein the zero cross signal is obtained by comparing acurrent slice level with the signal; and generating a next slice levelbased on the current slice level and the error value.
 12. The method ofclaim 11, wherein the sampling step comprises sampling a first halfcycle and a second half cycle of the zero cross signal to obtain a firstsampling number and a second sampling number.
 13. The method of claim12, wherein the step of obtaining the error value comprises obtainingthe error value based on the first sampling number and the secondsampling number.
 14. The method of claim 12, further comprising:updating the second sampling number when the zero cross signal ispositive; and obtaining the error value based on the first samplingnumber and the updated second sampling number.
 15. The method of claim12, further comprising: updating the first sampling number when the zerocross signal is negative; and obtaining the error value based on theupdated first sampling number and the second sampling number.
 16. Amethod for producing a zero cross signal of a signal in an opticalstorage drive, comprising: sampling a current zero cross signal of thesignal to obtain an error value, wherein the current zero cross signalis obtained by comparing a current slice level with the signal;obtaining a next slice level based on the current slice level and theerror value; and comparing the next slice level with the signal toobtain a next zero cross signal of the signal.
 17. The method of claim16, wherein the sampling step comprises: sampling a first half cycle anda second half cycle of the zero cross signal to obtain a first samplingnumber and a second sampling number.
 18. The method of claim 17, whereinthe step of obtaining the error value comprises obtaining the errorvalue based on the first sampling number and the second sampling number.19. The method of claim 17, further comprising: updating the secondsampling number when the zero cross signal is positive; and obtainingthe error value based on the first sampling number and the updatedsecond sampling number.
 20. The method of claim 17, further comprising:updating the first sampling number when the zero cross signal isnegative; and obtaining the error value based on the updated firstsampling number and the second sampling number.